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7. Embedded Programming

This week we are tasked with looking through the data sheet for the microcontrolled we are using.

We also need to compare the performance and workflows for other architectures.

RP2040

The Seeed XIAO uses a RP2040 microprocessor.

The data sheet is here.

Here is the brief overview given in the sheet.

“The RP2040 is supported with both C/C++ and MicroPython cross-platform development environments, including easy access to runtime debugging. It has UF2 boot and floating-point routines baked into the chip. The in-built USB can act as both device and host. It has two symmetric processor cores and high internal bandwidth, making it useful for signal processing and video. The chip has a large amount of internal RAM but uses external flash, allowing you to choose how much memory you need.”

Key features

  • Dual Cortex M0+ processor cores, up to 133 MHz
  • 264 kB of embedded SRAM in 6 banks -30 multifunction GPIO
  • 6 dedicated IO for SPI Flash (supporting XIP)
  • Dedicated hardware for commonly used peripherals
  • Programmable IO for extended peripheral support
  • 4 channel ADC with internal temperature sensor, 0.5 MSa/s, 12 bit conversion

Pinout

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Processor subsystem

The RP2040 processor subsystem consists of two Arm Cortex-M0+ processors — each with its standard internal Arm CPU peripherals — alongside external peripherals for GPIO access and inter-core communication.

  • Each processor use its own independent 32-bit AHB-Lite bus to access memory and memory-mapped peripherals (more detail in Bus Fabric)
  • The single-cycle IO block provides high-speed, deterministic access to GPIOs via each processor’s IOPORT
  • 26 system-level interrupts are routed to both processors
  • A multi-drop Serial Wire Debug bus provides debug access to both processors from an external debug host

Debug

The 2-wire Serial Wire Debug (SWD) port provides access to hardware and software debug features including: - Loading firmware into SRAM or external flash memory - Control of processor execution: run/halt, step, set breakpoints, other standard Arm debug functionality - Access to processor architectural state - Access to memory and memory-mapped IO via the system bu

Memory

ROM

A 16kB read-only memory (ROM) is at address 0x00000000. The ROM contents are fixed at the time the silicon is manufactured. It contains: - Initial startup routine - Flash boot sequence - Flash programming routines - USB mass storage device with UF2 support - Utility libraries such as fast floating point

SRAM

There is a total of 264kB of on-chip SRAM. Physically this is partitioned into six banks, as this vastly improves memory bandwidth for multiple masters, but software may treat it as a single 264kB memory region. There are no restrictions on what is stored in each bank: processor code, data buffers, or a mixture. There are four 16k x 32-bit banks (64kB each) and two 1k x 32-bit banks (4kB each).

Each SRAM bank is accessed via a dedicated AHB-Lite arbiter. This means different bus masters can access different SRAM banks in parallel, so up to four 32-bit SRAM accesses can take place every system clock cycle (one per master).

USB

The Bootrom provides a standard USB bootloader that makes a writeable drive available for copying code to the RP2040 using UF2 files.

A UF2 file copied to the drive is downloaded and written to Flash or RAM, and the device is automatically rebooted, making it trivial to download and run code on the RP2040 using only a USB connection.

Power supply

In a typical application, only a single 3.3V supply will be required.

The digital IO (IOVDD), USB PHY (USB_IOVDD) and ADC (ADC_IOVDD) will be powered directly from the 3.3V supply, and the 1.1V digital core supply (DVDD) will be regulated from the 3.3V supply by the on-chip voltage regulator.

GPIO

RP2040 has 36 multi-functional General Purpose Input / Output (GPIO) pins, divided into two banks.

In a typical use case, the pins in the QSPI bank (QSPI_SS, QSPI_SCLK and QSPI_SD0 to QSPI_SD3) are used to execute code from an external flash device, leaving the User bank (GPIO0 to GPIO29) for the programmer to use.

All GPIOs support digital input and output, but GPIO26 to GPIO29 can also be used as inputs to the chip’s Analogue to Digital Converter (ADC).

PWM

Pulse width modulation (PWM) is a scheme where a digital signal provides a smoothly varying average voltage. This is achieved with positive pulses of some controlled width, at regular intervals.

The fraction of time spent high is known as the duty cycle. This may be used to approximate an analog output, or control switchmode power electronics.

The RP2040 PWM block has 8 identical slices. Each slice can drive two PWM output signals, or measure the frequency or duty cycle of an input signal. This gives a total of up to 16 controllable PWM outputs.

All 30 GPIO pins can be driven by the PWM block.

Architectures and Workflows

You can see my individual exploration of the following on my individual page. - RP2040 in Arduino IDE - RP2040 in Thonny - Microbit (Intergrated Nordic nRF52833) in Mu

I also explored using the esp32 in Networking and Communications week in Thonny mainly.

More successfully in Interface and Application Programming in Thonny.

Opinions

Personally C and python doesn’t make much difference to me as they are both hard but I find Arduino IDE easier to use over thonny although this may be mostly the issues relating from the ESP32 C3.

The RP2040 seem stable and can do a lot of interesting things. The ESP32 C3 seems to be tempermental at points and there is not much documetation and example projects out there to base code on. Apparently the S3 has more support available so might be preferable.