Week 6 Assignments - Electronics Design

Group Assignment

The group assignment for this week was to:

Use the test equipment in your lab to observe the operation of a microcontroller circuit board (as a minimum, you should demonstrate the use of a multimeter and oscilloscope)
Document your work on the group work page and reflect what you learned on your individual page

Outcomes

Link to Group Site

The group assignment page for this week is on the 2025 Charlotte Super Fab Lab group site for Week 6 - Electronics Design.

What Was Learned

In the group assignment, we considered the use of a multimeter and of an oscilloscope to observe the operation of a microcontroller circuit board. For the multimeter, we considered how to use it in order to measure / observe both fixed and variable voltage outputs from the XIAO microcontroller. For the oscilloscope, we considered how to use it in order to measure / observe power voltage signal and noise levels, as well as changes in output signals for digital (blink) and analog (PWM) outputs.

This provided us the experience on:

How to use test equipment to measure these types of input signals
What to look for in these types of signals as part of assignments and project work going forward

Individual Assignment

The individual assignment for this week was to:

Use an EDA tool to design a development board that uses parts from the inventory to interact and communicate with an embedded microcontroller

Outcomes

I selected KiCad as the Electronic Design Automation (EDA) tool to use for designing a development board.

Learning KiCad - Tutorial

I had not used KiCad previously, so I began with KiCad's own Getting Started in KiCad introduction and tutorial. I found this tutorial to be fairly comfortable fit as introductory material - covering the concepts with a straightforward example.

In general, the KiCad workflow typically consists of two main design tasks:

Drawing a schematic - the schematic is a symbolic representation of the circuit that specifies what components are used and how they are connected.
Layout out a circuit board - the circuit board is the physical embodiment of the schematic, with actual physical footprints of the components laid out on the board. Component footprints are sets of copper pads that physically correspond to the connection pins / points of the real electronic components. Layout also includes copper tracks between pads to make the physical connections specified between components on the schematic.

KiCad has different workspaces to support the different parts of the design process. This includes:

Schematic Editor for drawing the schematic
PCB Editor for laying out the physical board
Symbol Editor for creating, editing, and managing symbols
Footprint Editor for creating, editng, and managing physical component footprints

The typical workflow for PCB design is:

The schematic is drawn first - using the schematic editor to add symbols for required components to the schematic, arranging them in sensible configuration for connectivity, and making all of the necessary connections between them
If needed, custom symbols may be created or added from external libraries using the symbol editor
Predefined component symbols typically have physical footprints associated with them, but if needed for some symbols, custom footprints may be created or added from external libraries using the footprint editor
Once the schematic is complete, the design is tested with an electrical rules check (ERC), to identify any electrical errors (e.g., missing power connection)
With a completed and ERC tested schematic, the schematic design is used in conjunction with the physical component footprints to create the PCB in the PCB Editor. The PCB Editor is then used to configure and refine the physical layout
Once the physical layout is complete, the entire design can be verified using design rule checking (DRC), in order to check for consistency between the schematic and physical layout, as well as clearances for component footprints and connection tracks

The tutorial covered basic concepts and developed a straightfoward board for a battery powered LED.

The first main part of the tutorial covered concepts and practices for schematic development. The schematic view uses symbols to represent electronic components, such as a zig-zag symbol for a resistor.

Components are selected and positioned on the schematic. Each component has connection points, and wiring connections are drawn beween component connection points by selecting the starting connector of one component and ending connector of another. In the tutorial example, the following symbols were used for different components. I laid out the schematic symbols, made connections between them, and conducted the ERC verification.

Power connection - up arrow (VCC)
Ground connection - down triangle (GND)
Resistor - zig zag (R1)
LED (diode) - triangle + line with arrows (D1)
Battery - alternating longer / shorter lines (BT1)
Power Network connectors - diamond (PWR_FLAG) - explicitly define power network connectivity for simulation/analysis

The second main part of the tutorial covered concepts and practices for circuit board layout of the PCB. The tutorial went over a 2-sided board design, but I wanted to focus on 1-sided board design, so kept the elements on 1 side.

The PCB Editor provides support for three primary physical layout tasks

Placing Footprints involves layout and arrangement of physical component footprints - making sure components are arranged with a sensible physical layout, allowing for attachment of components to the board and layout of the necessary connections between components
Routing Tracks to create the physical connections - creating and routing physical connection tracks that will be copper traces on the physical board
Board Outline - defining the physical size and shape of the entire board

In the tutorial example, the component footprints for the LED, battery, and resistor were updated into the PCB Editor from the schematic design. I used the PCB Editor to arrange the footprints with relatively straight pathways between connection points. I then routed the tracks between the connection points and made a DRC verification on the final design.

KiCad also provides a 3D viewer in order to visualize the physical PCB design. With the completed board design, it was very helpful to be able to see the outcome as a 3D view.

XIAO ESP32C3 Development Board - Schematic Design

With the experience of the tutorial, I began work on designing a development board that uses parts from the Fab inventory.

I began by adding the Fab electronics component library to the KiCad project environment. This involved adding both the symbol library for schematic design, as well as the footprint library for PCB layout. The steps for this process are:

Clone / download the Fab Electronics component library, storing it in a sensible local library folder location
Run KiCad
Use Preferences > Configure Paths - add a new environment variable called FAB pointing to the local location of the fab library
Use Preferences > Manage Symbol Libraries - add fab.kicad_sym as a symbol library
Use Preferences > Manage Footprint Libraries - add fab.pretty as a footprint library

I planned to use a XIAO family board as the development board, and I selected the XIAO ESP32C3 as the target board. I had several main design goals in mind for the board:

Central XIAO ESP32C3 microcontroller
External access to XIAO pins using connectors to support module connections
Multiple external access connectors for power / ground to support module connections
Basic onboard I/O - allowing for button input and LED output elements

With these design goals in mind, I refined the detail, planning for a schematic that would include:

External connectors separated into different categories, with physical separation to serve as a reminder on function
- Block of 4 for general inputs (A0-A2, D0-D3)
- Block of 2 for I2C communication (also D4/D5)
- Block of 3 for SPI communication (also D8-D10)
- Block of 2 for 5V
- Block of 2 for GND
- Block of 2 for 3.3V
Pin D7 used for dedicated onboard pushbutton input connection (with 10K pulldown resistor)
Pin D6 used for dedicated onboard LED output connection (with 50 ohm series resistor)

With the design plan in mind, I started a new KiCad schematic. I used the Add Symbols button to open the symbol chooser and navigated to the imported FAB library components (library filter search for "fab"). I selected each of the following schematic components and brought into the schematic design:

Module_XIAO-ESP32C3 - for the central XIAO ESP32C3 microcontroller
Power Breakout Connectors - to provide access to power connections from the microcontroller
- PWR_5V - for the 5 volt power connection
- PWR_3V3 - for the 3 volt power connection
- PWR_GND - for the ground connection
PinSocket_01x04_P2.54mm_Horizontal_SMD - 4-pin connector
PinSocket_01x03_P2.54mm_Horizontal_SMD - 3-pin connector
PinSocket_01x02_P2.54mm_Horizontal_SMD - 2-pin connectors (x4)
Switch_Tactile_Omron - pushbutton
R_1206 - resistor (x2)
LED_1206 - LED

KiCad also provides Labels that can be used to assign net names to wires and pins. Wires with the same net name are considered to be directly connected, so connections can be made using labels without drawing direct wire connections. I used labels to better organize the schematic into sections.

Organization of the schematic design considered the pin layout for the XIAO ESP32C3 (from Getting Started with Seeed Studio XIAO ESP32C3)

The final schematic design included a central microcontroller with breakout connections to the sides and onboard LED / Pushbutton below.

KiCad Schematic for XIAO ESP32C3 Development Board

XIAO ESP32C3 Development Board - Electrical Rules Check

With the schematic finalized, I conducted an electrical rules check (ERC) - Inspect > Electrical Rules Checker. This opens the ERC window, and I used the Run ERC to start the ERC. The ERC identified a number of potential electrical rule violations. I reviewed the ERC issues. These were all related to pins on the XIAO ESP32C3 that were not connected. The XIAO ESP32C3 has a number of connections that will not be used in the design (e.g., several battery related connections on the back of the development board), so these violations were not applicable to the design.

KiCad ERC for XIAO ESP32C3 Development Board

ERC settings can be configured for a project using File > Schematic Setup, under the Electrical Rules section. For the ERC, I used the default settings.

KiCad ERC Settings for XIAO ESP32C3 Development Board

XIAO ESP32C3 Development Board - PCB Design

With the schematic in place and ERC tested, the PCB design was opened and updated to bring in the component footprints. This was done with the Tools > Update PCB from Schematic.... This brings up a dialog that shows the updates that will be made to the PCB design - adding physical footprints to the PCB corresponding to symbols in the schematic. There are a number of update options, such as for removing physical components if their symbol has been removed in the schematic. This process also creates guidance connections based on the schematic connections - the "ratsnest" of thin lines indicating connections between component footprint pads. If the schematic design is revised, the update PCB from schematic process must be repeated in order to synchronize the PCB design with the schematic design.

Once the PCB design has been updated with physical components and connection guides from the schematic, the PCB Editor is used to lay out the physical board and connection traces. In general for PCB design, there are several considerations.

Some component footprints may have specific requirements for their placement, such as connectors along the edge and accessible placement for interactive elements such as butons
Some components may have electrical considerations for placement, such as capacitors being near associated IC power pins
Most components have a clear area surrounding the footprint (a "courtyard") to provide clearance from nearby components or connection traces. In general, courtyards should not intersect.
Components should be positioned for ease of routing trace connections - connected components should usually be close together and positioned to simplify trace connection routing.

Arrangement of the external connectors was relatively straightforward. Using the rats nest connections as general guidance, it took a bit more time and exploration to settle on the arrangment for the button, LED, and resistors that would be sensible for trace routing.

KiCad PCB Layout for XIAO ESP32C3 Development Board

With the components in place, a board outline was finalized in the edge cuts layer with dog bone corners to soften the basic rectangle. I created the board outline by:

Selecting the Edge.Cuts layer from the Layers list on the right side of the interface
Choosing the rectange shape tool for drawing
Drawing a rectangle around the board components, allowing edge overlap for connectors
Adding "dogbone" corners to the board shape - right click on the rectangle and select Shape Modification > Dogbone Corners...
Re-selecting the F.cu (front copper) layer to exit working on the board outline edge cuts and return to footprint / connection editing

KiCad PCB Layout with Edge Cuts for XIAO ESP32C3 Development Board

Routing presented the greatest challenge for the design. Main problems that needed to be addressed were:

Placement of connector blocks in the schematic wound up with crossover in the rats nest pin connection lines in the PCB for trace routing. This seemed to be a result of mirroring for left vs. right orientation. Some blocks needed to be replaced and use only rotation for orientation in order to get relatively straight rats nest connections.
Initial routing of traces seemed to be too narrow. I wanted to ensure reasonable tolerance to avoid broken traces in the milling process. Adjusting a bit to large caused issues with clearance constrants from the footprints. The board setup needed to be revised for larger than default values that balanced track width and clearance constraints with the component footprints.

I adjusted the clearance and minimum track connection size by setting the parameters in File > Board Setup... > Design Rules > Constraints with minimum clearance set to .75mm and minimum track width set to .5mm.

KiCad PCB Layout Board Setup - Design Rule Constraints

Once the basic routing was in place, I explored a number of refinements on routing. This included:

Adding filets to routing for a more rounded design
Adding teardrops to pads for better potential connections

KiCad Trace Routing for XIAO ESP32C3 Development Board

XIAO ESP32C3 Development Board - Design Rules Checking

KiCad includes settings for design rules to validate board designs. The design rules have default settings, but can also be configured for the project. The rules cover a variety of aspects, including constraints and sizes. Constraints can be adjusted for individual project needs using the design rules settings File > Board Setup... > Design Rules, such as setting constraints on the copper layers, holes, vias, and silkscreen. Other than the earlier adjusted clearance and track width, I used the standard settings.

The severity of a design rule violation can also be characterized as error, warning, or ignore.

A PCB design can be checked against the specified rules for the design using the KiCad Design Rules Checker functionality. Running the Design Rules Checker will show a listing of potential issues for the design. Issues are shown as Errors, Warnings, or Ignored, as specified in the Design Rules Settings.

For the XIAO ESP32C3 Development Board Design, I ran the Design Rules Checker. A number of issues were identified, but they were not functional errors that required a change in the design. The first set of issues were warnings about silkscreen labels. Since the board is planned to be milled in the lab without silkscreen, these did not impact the functional design. If the board were sent for fabriction, these would likely need to be addressed.

Design Rules Checker Warnings for XIAO ESP32C3 Development Board

The second set of issues were missing connection errors. These identified connections across the pushbutton, where the activated pushbutton would complete the connections. So, these did not need to be revised.

Design Rules Checker Connection Errors for XIAO ESP32C3 Development Board

Turning off the warnings, the Design Rules Checker shows no violations, so it should be possible for the board to be fabricated.

Design Files

https://wiki.seeedstudio.com/XIAO_ESP32C3_Getting_Started/ ↩