Week 07 - Feb 29th 2012 - Electronics Design

Weekly Assignment - Design and make the hello-world board

The main body of the task this week was to generate the .png images required to pass into the fab modules in order to generate the .rml files necessary to fabricate the hello-world board. The most common method of doing this was by designing the schematic and then the board layout in Eagle. Following Anna's tutorial it was simple enough to import the required fab and sparkfun component libraries, and put together a schematic that included the basic hello-world board plus an additional switch and LED.

The most helpful pointer when constructing the schematic was that not all components needed to be 'physically' linked by a net; making short nets linked to components and giving them the same name is sufficient to instruct Eagle that two or more parts should be linked. In my schematic all named nets have labels added to indicate their names. This allows the schematic to be a lot less chaotic. Another general tip was that once you get used to the workflow, typing common commands (add, net, name, etc) can be much quicker than finding the small icons.

To create the board layout, I roughly followed Anna's layout and manually routed all the traces. This was a very iterative process, whereby you need to strike a balance between compactness and having room to route all the traces you need.

I ran the design rules check using the default values and the board passed, so I exported the traces as a .png image at 500dpi. I opened the image and added some text and a border and saved my traces and cutout images.

When I loaded my traces image into the fab modules, as a final check I changed the 'cut traces' default pass number to 1 and make the path, to check all of the traces and pads would be cut around. Unfortunately there were two points where traces were not separated. This was because my Eagle design rule defaults were set to 8mil clearances not 16mil. Rather than redesign the board and export the traces again, I used Gimp to edit my images to create some extra clearance.

I also added some rounded corners to the cutout image. Below are my final images:

This board cut out okay, but I had not left a large enough margin around the board to prevent the cutout bit from overlapping with the outermost traces. The trace along the side was therefore very thin, although a continuity tester confirmed it was not broken. Also, there was not much room for the plasic supports for the improvised FTDI header, and the text was too small to be readable. However, I was still able to stuff the board and hopefully in a couple of weeks will be able to make it do something interesting.

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