Group Embedded

Group work - Embedded Programming

This weeks assignment was to Compare different Architectures of Microcontrollers

All MCs use one of two basic design models: Harvard Architecture and von-Neumann architecture

Harvard architecture

The Harvard architecture is a computer architecture with physically separate storage and signal pathways for instructions and data. The term originated from the Harvard Mark I relay-based computer, which stored instructions on punched tape (24 bits wide) and data in electro-mechanical counters. These early machines had data storage entirely contained within the central processing unit, and provided no access to the instruction storage as data. Programs needed to be loaded by an operator; the processor could not initialize itself.

Today, most processors implement such separate signal pathways for performance reasons, but actually implement a modified Harvard architecture, so they can support tasks like loading a program from disk storage as data and then executing it.

Memory

In a Harvard architecture, there is no need to make the two memories share characteristics. In particular, the word width, timing, implementation technology, and memory address structure can differ. In some systems, instructions for pre-programmed tasks can be stored in read-only memory while data memory generally requires read-write memory. In some systems, there is much more instruction memory than data memory so instruction addresses are wider than data addresses.

Applications and features of Harvard Architectures

The principal advantage of the pure Harvard architecture—simultaneous access to more than one memory system—has been reduced by modified Harvard processors using modern CPU cache systems. Relatively pure Harvard architecture machines are used mostly in applications where trade-offs, like the cost and power savings from omitting caches, outweigh the programming penalties from featuring distinct code and data address spaces. Digital signal processors (DSPs) generally execute small, highly optimized audio or video processing algorithms. They avoid caches because their behavior must be extremely reproducible. The difficulties of coping with multiple address spaces are of secondary concern to speed of execution. Consequently, some DSPs feature multiple data memories in distinct address spaces to facilitate SIMD and VLIW processing. Texas Instruments TMS320 C55x processors, for one example, feature multiple parallel data buses (two write, three read) and one instruction bus. Microcontrollers are characterized by having small amounts of program (flash memory) and data (SRAM) memory, and take advantage of the Harvard architecture to speed processing by concurrent instruction and data access. The separate storage means the program and data memories may feature different bit widths, for example using 16-bit wide instructions and 8-bit wide data. They also mean that instruction prefetch can be performed in parallel with other activities. Examples include the PIC by Microchip Technology, Inc. and the AVR by Atmel Corp (now part of Microchip Technology).

The speed aspect : A lot has been discussed about the Harvard architecture, but without the speed any architecture can’t be accepted. But in case of the Havard architecture the manufacturers have designed the architecture in such a way that it will be able to process the data with a much higher speed. Yes, all care has been taken so that the architecture can process data with a high speed.

By implementing the same formula the modern days CPU are being manufactured so that the new CPU can run with a much faster sped and can also process the data effectively. The concept of the CPU cache is also being implemented while designing the Harvard architecture.

Von Neumann Architecture

The von Neumann architecture, which is also known as the von Neumann model and Princeton architecture, is a computer architecture based on the 1945 description by the mathematician and physicist John von Neumann and others in the First Draft of a Report on the EDVAC. This describes a design architecture for an electronic digital computer with parts consisting of a processing unit containing an arithmetic logic unit and processor registers; a control unit containing an instruction register and program counter; a memory to store both data and instructions; external mass storage; and input and output mechanisms. The meaning has evolved to be any stored-program computer in which an instruction fetch and a data operation cannot occur at the same time because they share a common bus. This is referred to as the von Neumann bottleneck and often limits the performance of the system.

The design of a von Neumann architecture machine is simpler than that of a Harvard architecture machine, which is also a stored-program system but has one dedicated set of address and data buses for reading data from and writing data to memory, and another set of address and data buses for instruction fetching.

Applications and features of Von Neumann Architecture

The Von Neuman architecture has got extensive application in everyday life. Keeping in mind the extensive application the Von Neuman architecture has been introduced as a subject in the engendering degree. From the third semester engineering students will have the subject as their curriculum. The Von Neuman architecture consists of some important features and here we will have a detailed elaboration to the features.

Memory: We all know that the Von Neuman is nothing but a computer having the feature of data storage. In the architecture of the Von Neuman the memory plays a vital role and it is considered as one of the important feature. Mainly this is responsible for both holding and starting of data and programming data. In modern days this has been replaced by the RAM and now we are using RAM for this purpose.

Control Unit: This unit is mainly responsible for the controlling aspect. All the data stored in the memory and during the processing of data the control unit plays the role and it manages the data flow. In fact, to be more typically it is “One At A Time”. The control unit follows the principle of the One At A Time and accordingly it process all the data.

Input– output: Like all electronics devices the Von Neuman architecture also has an input/output architecture. It is the basic function is same and nothing specially has been designed for the input and output architecture. With the Input and output device on a person can communicate with the device.

ALU: ALU or the Arithmetic Logic Unit has a great importance in the Von Neuman architecture. Any sort of addition, subtraction, multiplication and division of the data will be carried out by this ALU. In addition to that any other kind of algorithmic function and activities will be carried out by the ALU. These are the basic aspect of the Von Neuman architecture which you must aware of.

Difference between Harvard and Von Neumann Architecture

Harvard Arhitecture

1. The name is originated from “Harvard Mark I” a relay based old computer.

2. It required two memories for their instruction and data.

3. Design of Harvard architecture is complicated.

4. Harvard architecture is required separate bus for instruction and data.

5. Processor can complete an instruction in one cycle

6. Easier to pipeline, so high performance can be achieve.

7. Comparatively high cost.

Von Neumann Architecture

1. It is named after the mathematician and early computer scientist John Von Neumann.

2. It required only one memory for their instruction and data.

3. Design of the von Neumann architecture is simple.

4. Von Neumann architecture is required only one bus for instruction and data.

5. Processor needs two clock cycles to complete an instruction.

6. Low performance as compared to Harvard architecture.

7. It is cheaper.

Sources : ~Wiki, Microchip, edgefxkit